MACH210A7VC Electrically-Erasable Switch Matrix PLD - I/Ps have intrnl pull-up resistors
From Various
| # of Cells (macros) Per Array | 16 |
| # of Inputs From Switch Matrix | 22 |
| # of Product Terms Per Array | 68 |
| 3-State Voltage Maximum | 7.5 |
| @Iol (A) | 16m |
| @V(IH) (test) (V) | 5.25 |
| @V(IL) (test) (V) | 0 |
| Digital Input V Max (V) | 7.5 |
| I(IH) Maximum (A) | 10u |
| I(IL) Maximum (A) | 100u |
| Military | N |
| Nom. Supp (V) | 5 |
| Number of I/O Terminals | 32 |
| Number of Input Terminals | 6 |
| Number of Output Terminals | 0 |
| Output Config | 3-State |
| Output Logic Polarity | Programmab |
| Package | TQFP |
| Pins | 44 |
| Technology | CMOS |
| Total # of Logic Cell (macros) | 64 |
| Total Number of Arrays | 4 |
| Total Number of Product Terms | 272 |
| V(OL)Max.(V)Lo Level Out.Volt. | 0.5 |
| t(PLH) Maximum (S) | 7.5n |
